From Monday, January 26 to Thursday, January 29, the Electrical Engineering Department hosted a workshop titled “From Model to Silicon: Mastering Edge AI Design Flows,” delivered by Dr. Atif Raza Jafri.

During the series, Dr. Jafri discussed the shift of Artificial Intelligence from centralized data centers to the edge, emphasizing the need for specialized hardware–software co-design workflows. He provided a structured overview of how AI models can be implemented and optimized across three distinct hardware platforms: Microcontrollers (STM32), NVIDIA Jetson Nano, and Adaptive SoCs/FPGAs (AMD-Xilinx). Throughout the sessions, participants examined practical trade-offs between power consumption, latency, and throughput, and were introduced to the key toolchains used to deploy optimized neural networks on real hardware.

Dr. Jafri began with the ultra-low power flow using STMicroelectronics STM32, highlighting STM32Cube.AI and NanoEdge AI Studio as enabling toolchains. He explained how pre-trained models can be converted into optimized C-code and discussed core evaluation points such as memory footprint (RAM/Flash) and inference cycles, along with hardware-in-the-loop validation scenarios relevant to predictive maintenance and vibration analysis.

He then covered high-performance vision workflows on NVIDIA Jetson Nano, introducing TensorRT and the DeepStream SDK. Dr. Jafri discussed techniques for accelerating real-time computer vision pipelines, including CUDA-based processing, timing analysis, and model quantization approaches (INT8/FP16) aimed at improving throughput and frames-per-second performance in video analytics applications.

The series concluded with the deterministic adaptive flow on AMD-Xilinx platforms, focusing on the Zynq UltraScale+ MPSoC and the Vitis AI toolchain. Dr. Jafri explained how models can be compiled and optimized for deployment on a Deep Learning Processor Unit (DPU), and how FPGA-based acceleration can support reliable, high-performance inference for edge deployments.

Dr. Atif Raza Jafri is a Digital Architecture Research Lead and Industrial Consultant at the University of Glasgow, with over 26 years of experience spanning industrial engineering, academic leadership, and senior governance. His current work focuses on low-power control systems for quantum computing, lightweight AI for healthcare, and digital transformation of outcome-based education. He holds a PhD in Information Technology and Communication from Télécom Bretagne and a Master’s in Embedded Systems from the University of Nice Sophia Antipolis.

The following are the highlights of the event: